In the analog Integrated circuits course, we were required to build a Two-stage Miller-compensated CMOS operational amplifier using 0.3 um process to achieve the required specifications within the given constraints (Shown in slide 3.) I managed a gain of 105.3 (dB) open-loop gain with a cut-off frequency of 255.5 (Hz) and a bandwidth of 60.6 (MHz) at 75 (deg) phase margin.